Version 3 - 24-Word Binary Output Coding

HERMES OPTIMUS v3: 24-Word Edition

Expanded 30-50-12 architecture with 12-bit output decoding achieving 90.40% stress-suite accuracy and ~98% realistic typo accuracy on 24-word vocabulary

30-50-12 with 12-Bit Binary Output Decoding (V3)

HERMES OPTIMUS V3 30-50-12 with 24-Word Binary Codebook

Click to enlarge - V3 shows 12 output bits mapped to 24 words via Hamming codebook

  • Input Layer: 30 neurons
    • Positions 0-3 (4 neurons): Sorted positional encoding (normalized values 0-1)
    • Positions 4-29 (26 neurons): Binary presence flags for A-Z
  • Hidden Layer: 50 neurons with sigmoid activation
  • Output Layer: 12 neurons, interpreted as bit channels for 24-word binary decoding

V3 maintains the proven 30-neuron hybrid input encoding from V2 but reinterprets the 12 output neurons as bit channels. Each output is rounded to binary (0 or 1), then the resulting 12-bit pattern is matched against a 24-entry Hamming codebook to select the nearest word. This innovation doubles vocabulary capacity from 12 to 24 words without expanding the output layer, critical for TI-84 memory constraints.

Evolution: v1.0 → v2.0 → v3

v1.0: 4-60-12 Positional Baseline

  • 4 input neurons (positional encoding only)
  • 60 hidden neurons
  • ~85% accuracy, poor on scrambled words

v2.0: 30-50-12 Hybrid Robustness

  • 30 input neurons (hybrid: 4 positional + 26 binary presence)
  • 50 hidden neurons (memory-optimized)
  • 96.86% accuracy - robustness breakthrough
  • 12-word direct output classification

v3: 30-50-12 with Binary Codebook (Current)

  • 30 input neurons (same hybrid encoding)
  • 50 hidden neurons (same memory footprint)
  • 12 bit-channel outputs → 24-word Hamming codebook
  • 90.40% stress-suite accuracy, ~98% realistic typo accuracy
  • 24-word vocabulary (double capacity, same memory)

Memory Optimization

Weight Matrix [I]:

30×50 = 1,500 weights

Weight Matrix [J]:

50×12 = 600 weights

Biases:

50 + 12 = 62 values

Total Memory:

~22.5KB (1.5KB remaining)

The architecture was precisely calibrated to fit within the TI-84's 24KB RAM limit. Reducing from 60 to 50 hidden neurons was necessary to accommodate the expanded 30-neuron input layer while maintaining sufficient overhead for program execution.

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